JPH01144667A - 基板電位検出回路 - Google Patents

基板電位検出回路

Info

Publication number
JPH01144667A
JPH01144667A JP62302603A JP30260387A JPH01144667A JP H01144667 A JPH01144667 A JP H01144667A JP 62302603 A JP62302603 A JP 62302603A JP 30260387 A JP30260387 A JP 30260387A JP H01144667 A JPH01144667 A JP H01144667A
Authority
JP
Japan
Prior art keywords
substrate
well
potential detection
substrate potential
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62302603A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0513542B2 (en]
Inventor
Hiromare Muroga
室賀　啓希
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62302603A priority Critical patent/JPH01144667A/ja
Priority to DE8888119715T priority patent/DE3880635T2/de
Priority to EP88119715A priority patent/EP0318869B1/en
Priority to CA000584287A priority patent/CA1300281C/en
Priority to MYPI88001378A priority patent/MY103799A/en
Priority to KR1019880015886A priority patent/KR910009804B1/ko
Publication of JPH01144667A publication Critical patent/JPH01144667A/ja
Priority to US07/523,178 priority patent/US4980745A/en
Publication of JPH0513542B2 publication Critical patent/JPH0513542B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • G01R31/275—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements for testing individual semiconductor components within integrated circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/145—Indicating the presence of current or voltage
    • G01R19/155—Indicating the presence of voltage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67—Complementary BJTs
    • H10D84/673—Vertical complementary BJTs

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP62302603A 1987-11-30 1987-11-30 基板電位検出回路 Granted JPH01144667A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP62302603A JPH01144667A (ja) 1987-11-30 1987-11-30 基板電位検出回路
DE8888119715T DE3880635T2 (de) 1987-11-30 1988-11-25 Substratpotentialdetektionsschaltung.
EP88119715A EP0318869B1 (en) 1987-11-30 1988-11-25 Substrate potential detecting circuit
CA000584287A CA1300281C (en) 1987-11-30 1988-11-28 Substrate potential detecting circuit
MYPI88001378A MY103799A (en) 1987-11-30 1988-11-28 Substrate potential detecting circuit
KR1019880015886A KR910009804B1 (ko) 1987-11-30 1988-11-30 기판전위검출회로
US07/523,178 US4980745A (en) 1987-11-30 1990-05-15 Substrate potential detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62302603A JPH01144667A (ja) 1987-11-30 1987-11-30 基板電位検出回路

Publications (2)

Publication Number Publication Date
JPH01144667A true JPH01144667A (ja) 1989-06-06
JPH0513542B2 JPH0513542B2 (en]) 1993-02-22

Family

ID=17910968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62302603A Granted JPH01144667A (ja) 1987-11-30 1987-11-30 基板電位検出回路

Country Status (7)

Country Link
US (1) US4980745A (en])
EP (1) EP0318869B1 (en])
JP (1) JPH01144667A (en])
KR (1) KR910009804B1 (en])
CA (1) CA1300281C (en])
DE (1) DE3880635T2 (en])
MY (1) MY103799A (en])

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2953755B2 (ja) * 1990-07-16 1999-09-27 株式会社東芝 マスタスライス方式の半導体装置
US5250834A (en) * 1991-09-19 1993-10-05 International Business Machines Corporation Silicide interconnection with schottky barrier diode isolation
KR20160133113A (ko) 2015-05-12 2016-11-22 김금녀 음성 안내 매트

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE7145628U (de) * 1970-12-10 1972-03-16 Motorola Inc Integrierter transistor mit saettigungsanzeiger
US3720848A (en) * 1971-07-01 1973-03-13 Motorola Inc Solid-state relay
US4336489A (en) * 1980-06-30 1982-06-22 National Semiconductor Corporation Zener regulator in butted guard band CMOS
US4628340A (en) * 1983-02-22 1986-12-09 Tokyo Shibaura Denki Kabushiki Kaisha CMOS RAM with no latch-up phenomenon
US4823314A (en) * 1985-12-13 1989-04-18 Intel Corporation Integrated circuit dual port static memory cell
US4829359A (en) * 1987-05-29 1989-05-09 Harris Corp. CMOS device having reduced spacing between N and P channel

Also Published As

Publication number Publication date
CA1300281C (en) 1992-05-05
EP0318869A1 (en) 1989-06-07
EP0318869B1 (en) 1993-04-28
US4980745A (en) 1990-12-25
KR910009804B1 (ko) 1991-11-30
DE3880635T2 (de) 1993-08-05
DE3880635D1 (de) 1993-06-03
KR890008977A (ko) 1989-07-13
JPH0513542B2 (en]) 1993-02-22
MY103799A (en) 1993-09-30

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